| Publication Title: |
PERFORMANCE TRADEOFFS IN MULTITHREADED PROCESSORS |
| Publication Author: |
Agarwal, A. |
| Additional Authors: |
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| LCS Document Number: |
MIT-LCS-TR-501 |
| Publication Date: |
4-1-1991 |
| LCS Group: |
No Group Specified |
| Additional URL: |
No URL Given |
| Abstract: |
| High network latencies in large-scale multiprocessors can cause a significant drop in processor utilization. By maintaining multiple process contexts in hardware and switching among them in a few cycles, multithreaded processors can overlap computation with memory accesses and reduce processor idle time. |
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