LCS Publication Details
Publication Title: ANALYZING MULTIPROCESSOR CACHE BEHAVIOR THROUGH DATA REFERENCE MODELING
Publication Author: Tsai, Jory
Additional Authors: Agarwal, Anant
LCS Document Number: MIT-LCS-TM-497
Publication Date: 2-1-1993
LCS Group: No Group Specified
Additional URL: No URL Given
Abstract:
This paper develops a data reference modeling technique to estimate with high accuracy the cache miss ratio in cache-coherent multiprocessors. The technique involves analyzing the dynamic data referencing behavior of parallel algorithms. Data reference modeling first identifies of different types of shared data blocks accessed during the execution of a parallel algorithm, then captures in a few parameters the cache behavior of each shared block as a function of the problem size, number of processors, and cache size, and finally constructs an analytical expression for each algorithm to estimate the cache miss ratio.
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