| Publication Title: |
A HARDWARE ASSISTED METHODOLOGY FOR VLSI DESIGN RULE CHECKING |
| Publication Author: |
Seiler, L.D. |
| Additional Authors: |
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| LCS Document Number: |
MIT-LCS-TR-337 |
| Publication Date: |
2-1-1985 |
| LCS Group: |
No Group Specified |
| Additional URL: |
No URL Given |
| Abstract: |
| Checking for violations of geometrical design rules on integrated circuit masks is a computationally intensive task. This thesis describes a novel methodology that combines software and a small amount of special hardware to speed up design rule checking (DRC) significantly. The hardware implements the inner loop of a raster scan DRC algorithm. |
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