Abstract

Guarded atomic action machines are state machines which execute certain actions only if specific predicates are true. Execution of each action updates the state in an atomic manner. Thus there is a sequential ordering of action that describes the updates of the state machine.

In my research I am planning on exploring methods for synthesizing guarded atomic action machines using asynchronous circuits. Asynchronous circuits promise a number of improvements over the well understood sequential circuits:

• asynchronous circuits can be optimized for the average case, rather than worst case
• low power is an inherent property of asynchronous circuits, no special techniques such as clock gating are required to achieve it
• asynchronous circuits are more resilient to bad layout and process variations
  

In my research I will look at how to decouple and overlay execution of atomic actions, evaluation of action guards. This research also promises to give insight into synthesis of synchronous multi-cycle circuits for guarded atomic actions.