Evolutionary Multi-Objective Analog/RF Circuit Optimization:
Exploiting Easy-to-Get Designer Knowledge to Guide Variation Operators
Varun Aggarwal, Lynne Salameh & Una-May O'Reilly
WHAT?
Circuit optimization has primarily taken two directions, first that of
stochastic black-box optimization with SPICE-based evaluations [1] (also
known as simulation-based approach) and second, that of expressing the
circuit as equations which are then plugged into a geometric program solver
[2]. The former requires little effort and time from the circuit designer
who only has to setup SPICE scripts for performance measurement of the
circuit and to choose which variables are optimized. However, the optimization
is slow since SPICE is invoked in-loop for every iteration of the optimization
and there is no exploitation of the knowledge of the particular circuit
being optimized. Also, blackbox optimization gives no guarantee of finding
the global optima. The latter approach, that of equation based optimization
using geometric programming, requires a lot of effort and time on part
of the designer to write accurate equations for the circuit. Once the
equations are written, fast interior point algorithms are used to find
the global optima. Though the optimization algorithm guarantees global
optimization, the inaccuracy in the optimization is due to inaccurate
circuit equations and transistor models. These inaccuracies and the requirement
of expressing models in the form of posynomials can be prohibitive.
Given the above scenario, the industry has adopted black-box optimization
as a tool-based approach, where the designer can use a blackbox
optimization tool to size any circuit he/she wants. This approach is prohibitive
for very large circuits. Geometric Programming has shown some acceptance
as an IP-based approach, where geometric programs for particular
circuits (popularly called IP in semiconductor industry) are written and
these circuits can be very quickly optimized/ported to a new technology.
Extension to new circuits is not straightforward and requires time and
effort.
We are interested in simulation-based approaches because they can generally
be applied to any circuit. Our goal is to address the slow speed and inaccuracy
of these approaches by using some knowledge from the particular circuit
being optimized. Currently, these algorithms are 'blind' and behave similarly
for all circuits. When we incorporate knowledge, our primary concern is
to only demand circuit knowledge that the designer is able to provide
with minimal effort and time. As a secondary concern we demand that
our algorithm should be robust to errors in this information.
This goal leads to number of questions: Is there exploitable knowledge
about circuits, which a black-box optimization algorithm could use? The
fact that some circuits can be expressed as geometric programs indicates
some useful ''structure'' (in Operational Research terms) in the circuit
space. Is this information easy for the designer to provide? What is an
effective representation of this information? How can the black-box optimization
algorithm incorporate this information for better optimization?
We have found some answers to some of these questions by looking more
closely at how designers size circuits and what information they use for
it. As well, we have looked in depth into theory and practice of genetic
operators for evolutionary algorithms and exploited insights therein to
incorporate this information into the algorithm. We believe we have made
some strides towards being able to understand how to design operators
for multi-objective optimization in general.
HOW
We have identified structure (or a set of relationships or patterns)
in the design space of circuits which is exploitable by any stochastic
black-box algorithm in general [3]. In our understanding, this structure
is a key element of the intuition-based strategy that an analog designer
actively uses during manual sizing. We have devised a compact tabular
representation to capture this information from the designer. The information,
specifically, is which design variables are correlated to a given circuit
specification and what is the sensitivity direction of the specification
with each of the correlated variable. The qualitative nature of the information
makes it very easy for the designer to provide and makes chances of designer
error very low.
We have devised a mechanism by which a stochastic algorithm can use this
information to do fast and more accurate optimization. Tested on two opamp
topologies using of a multi-objective genetic algorithm, the technique
gives a speedup of more than 10x and much more accurate optimization than
a baseline algorithm without any information about the circuit. Around
38% optimal circuits of baseline algorithm are worse than our algorithm,
while 5% of circuits of our circuits are minimally worse than the baseline
algorithm [3].
The first part of the innovation is in designing a compact representation
to qualitatively capture design knowledge, while the second part is to
design operators to incorporate this knowledge in to a multi-objective
algorithm for better optimization. We believe that this work is the first
steps towards building a theory of operators for multi-objective evolutionary
optimization and modifying the ideas of building-blocks from single-objective
optimization to suit pareto-optimization [4].
We are working on using our approach to optimize larger blocks such as
PLLs.
References:
[1] B. D.
Smedt and G. Gielen. WATSON: Design space boundary exploration and model
generation for analog and RF IC design. IEEE Trans. on CAD of Int. Circuits
and Systems,22(2):213�224, 2003.
[2] M. Hershenson, S. S. Mohan, S. P. Boyd, and T. H. Lee. Optimization
of inductor circuits via geometric programming. In DAC, pages 994�998,
New York, NY, USA, 1999. ACM Press.
[3] V. Aggarwal, U.M. O'Reilly, "Structural information in simulation-based
approaches for efficient circuit sizing", Paper under Submission
[4] V. Aggarwal, U. M. O'Reilly, "COSMO: A correlation sensitive
mutation operator for multi-objective optimization", Accepted at
GECCO 2007, London, UK.
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